Acqiris has developed, designed and implemented its own proprietary application specific integrated circuits (ASIC), specifically to optimize the performance of high-speed data conversion systems. These chipsets are integrated into the range of Acqiris high-speed digitizers and are ideal for the high-precision, high-speed, power-sensitive applications where they are utilized.

XLFidelity
The Acqiris XLFidelity ADC chipset provides the signal conditioning, amplification and interleaving functions essential to achieve high-speed data acquisition at GS/s rates. The XLFidelity chipset includes an analog front-end ASIC (FEA102) for signal conditioning, including gain control and filtering. The device also features on-chip analog and digital trigger processing circuits.  The XLFidelity cross point switch ASIC (CPS103) is deigned to interleave multiple ADC devices, and includes on-chip calibration and offset-correction circuitry, essential for low-noise, high-speed applications.

JetSpeed
The JetSpeed ADC chipset provides the vital clock and synchronization signals, along with the capture and memorization of acquired data with maximum data throughput. The JetSpeed clock ASIC (COS101) includes the functions needed to build the time base system of a multi-ADC acquisition system. With a clock generator and a clock distribution circuit, up to 4 ADC’s can be interleaved to sample at up to 5 GS/s. The synchronization of multiple clock circuits is made possible with special clock inputs and outputs. The JetSpeed acquisition and memory controller ASIC (MAC100) is designed for the capture and memorization of 8-bit or 16-bit digital data, typically generated by high-speed analog-to-digital converters, at speeds of up to 1 Gbyte/s. The design uses large internal static RAMs, high clock frequencies, and is able to accept and generate LVDS (low-voltage differential signals) levels for the fast input/output signals.

JetSpeed II
The JetSpeed II ADC chipset provides spectacular performance in speed and data throughput in high-speed data converter systems. The JetSpeed II clock ASIC (COS201) has four differential outputs to drive up to 4 ADCs or DACs. These are distributed with appropriate delays to allow interleaving of 2 or 4 devices, providing sample rates of up to 10 GS/s. The JetSpeed II memory and acquisition control ASIC (MAC200) was designed for the capture of 10-bit or 20-bit digital data, typically generated by high-speed analog-to-digital converters, at speeds of up to 2 GS/s (of 10-bit), it can also be used for the generation of a high-speed 20-bit digital data stream.